CV Lattes
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ORCID
Universidade Estadual Paulista (UNESP). Campus Experimental São João da Boa Vista. Faculdade de Engenharia (Institutional affiliation from the last research proposal) Birthplace: Brazil
She holds a degree in Electrical Engineering with an emphasis on computers from Centro Universitário da FEI (2000), a master's degree (2003) and a PhD (2008) in Electrical Engineering (microelectronics) from the University of São Paulo. Her postdoctoral studies were carried out at the Polytechnic School of the University of São Paulo in cooperation with the Imec Research Center/Belgium (2014). She managed the Training Center for Integrated Circuit Designers of the Polytechnic School of USP of the CI-Brazil program. She is currently a professor at the Universidade Estadual Paulista (UNESP) and an associate researcher at the University of São Paulo. She has experience in Electrical Engineering, with an emphasis on microelectronics, working mainly on the following topics: SOI CMOS technology, FinFET, Nanowire, Nanosheet, Radiation, strained devices, and tunneling transistors (TFETs). She is a senior member and President of the Electron Devices Society (EDS) Chapter of the IEEE South-Brazil Section. She is a CNPq Level 1D productivity researcher and participates in international cooperation projects between Brazil and Belgium. (Source: Lattes Curriculum)
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(Only some records are available in English at this moment)
With the continuous evolution and miniaturization of devices, controlling short-channel effects of conventional MOSFET transistors has become a significant challenge for technological progress. MOSFET transistors fabricated using SOI technology have emerged as a solution, resulting in notable performance improvements, greater resistance to short-channel effects, and higher switching speed…
With the advancement of integrated circuit manufacturing technology, device scaling makes controlling the charges in the channel region of conventional MOS transistors increasingly difficult and complex. The SOI (Silicon-On-Insulator) MOSFET transistor with multiple gates, also known as the SOI FinFET transistor, appears as an alternative to planar transistors due to the better electrosta…
With the continuous reduction of devices, the control of short-channel effects in conventional MOSFETs has become a problem for technological evolution. MOS transistors manufactured in SOI technology began to be used due to their excellent performance improvements, greater immunity to short-channel effects and higher switching speed.This project aims to study the electrical behavior of fu…
The constant evolution of technology depends, to a large extent, on the continuous development of semiconductor devices. These electronic components are essential for the operation of a wide range of devices, from smartphones and computers to communication systems and industrial applications. One of the recent and promising advances in this field is the MISHEMT (Metal-Insulator-Semiconduc…
The continuous technological advance that we are experiencing today in the electronics field is largely due to the ability to build very small electronic circuits thanks to the MOSFETtechnology, which allows us to use nanometer-scale devices. Because of this, it is extremely important to understand its operation in depth, through the electrical characterization of this technology.In this …
With the advancement of integrated circuit manufacturing technology, the devices scaling makes difficult the controlling the charges in the channel region of the conventional MOS transistor. The SOI transistor (Silicon-On-Insulator) multi-gate MOSFETs, also called as FinFET transistors, appear as an alternative to planar transistors due to better electrostatic coupling between gate and ch…
(Only some records are available in English at this moment)
Transistors are fundamental components in electronics and are, therefore, directly related to technological advancement. The development of gallium nitride (GaN)-based transistors, such as the High Electron Mobility Transistor (HEMT), has significantly improved the performance of analog circuits and systems that operate at medium power and high frequencies, surpassing traditional silicon-…
With the continuous reduction of devices, CMOS technology manufacturing, which currently reached nanometric scales, has been faced with problems such as short channel effects. As an alternative to this technology, industries have replaced conventional CMOS technology for silicon on insulator (SOI) technology and multi-gate structures (MuGFETs). However, for dimensions below 22nm even this…
In order to continuing scaling devices, new technologies have been studied as an alternative to conventional CMOS. One of devices that can overcome the limitations of MOSFET transistors is the Tunnel-FET (TFET) that can provide very low off state current and a subthreshold swing lower than the 60 mV/dec at room temperature, the theoretical limit for MOS technology. In order to improve the…
| 10 / 9 | Completed research grants |
| 3 / 3 | Ongoing scholarships in Brazil |
| 11 / 11 | Completed scholarships in Brazil |
| 1 / 1 | Ongoing scholarships abroad |
| 2 / 2 | Completed scholarships abroad |
| 27 / 26 | All research grants and scholarships |
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