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Design, manufacture and electrical characterization of CMOS transconductance operational amplifiers by using an evolutionary system integrated to the spice (AGSPICE)

Grant number: 12/10394-3
Support type:Scholarships in Brazil - Doctorate
Effective date (Start): August 01, 2012
Effective date (End): July 31, 2016
Field of knowledge:Engineering - Electrical Engineering - Electrical, Magnetic and Electronic Circuits
Principal researcher:Salvador Pinillos Gimenez
Grantee:Rodrigo Alves de Lima Moreto
Home Institution: Campus de São Bernardo do Campo. Centro Universitário da FEI (UNIFEI). Fundação Educacional Inaciana Padre Sabóia de Medeiros (FEI). São Bernardo do Campo , SP, Brazil

Abstract

The analog integrated circuits design is a complex task due to the large number of input variables to be determined simultaneously in order to comply within numerable design features of an analog integrated circuit (IC) design. In practice, the analog integrated circuits (ICs) design is a slow process, where the designer must interact repetitively with the integrated circuits simulator. There are many possible solutions to meet the multiple features of an analog IC. These infinite solutions are based on different combination of transistors' dimensions and combination of the IC bias conditions. The development time and the achievement of the analog IC design features, therefore, strongly rely on the designer experience. With the objective of reducing the analog IC development time as well as the continuous interaction between the designer and the simulator, a program (software) has been developed, based on Evolutionary Electronics techniques, which uses one of the Artificial Intelligence (AI) techniques, in this case, the Genetic Algorithm (GA), which integrated to the integrated circuits simulator Spice Opus, constitutes the evolutionary system to analog ICs designs, entitled AGSPICE. The AGSPICE system developed during the master's degree research of the candidate to the doctorate scholarship, has the capability to automatically search for solutions that best meet the different design features, without the designer continuous intervention, thus reducing significantly the development time of the analog ICs project. The results obtained with the AGSPICE system, during the master's degree research of the candidate, showed very promising results that motivate us to give continuity to this research. Therefore, the aim of this doctorate project is to manufacture the different Operational Transconductance Amplifiers (OTAs), developed during the master's degree research (micropower, high voltage gain and high transition frequency), using an ICs CMOS commercial process, via MOSISEducational Program (MEP). Moreover, the different OTAs will be implemented with MOSFETs of conventional (rectangular) and unconventional gate geometries [circular, in S shape (Wave), in hexagonal shape (Diamond), in octagonal shape5 (OCTO) and in "<" shape (FISH)], in order to compare the different electrical performances of the different OTAs as a function of the different geometries of transistors, which were used for its implementation. Recent studies demonstrate that the MOSFETs implemented with these unconventional gate geometries are able to potentialize the electrical performance of the transistors, when compared to that observed in the conventional equivalents, considering the same gate area (AG), the same geometric factor (W/L) and the same bias conditions. After the experimental electrical characterization of these OTAs, we also aim to identify the best style of layout for the implementation of analog ICs, focusing on the benefits that these transistors can bring to the OTAs in terms of area gains, voltage gains, operation frequency gains, etc. (AU)

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Scientific publications
(References retrieved automatically from Web of Science and SciELO through information on FAPESP grants and their corresponding numbers as mentioned in the publications by the authors)
DE LIMA MORETO, RODRIGO ALVES; THOMAZ, CARLOS EDUARDO; GIMENEZ, SALVADOR PINILLOS. Gaussian Fitness Functions for Optimizing Analog CMOS Integrated Circuits. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v. 36, n. 10, p. 1620-1632, OCT 2017. Web of Science Citations: 4.

Please report errors in scientific publications list by writing to: cdi@fapesp.br.