| Grant number: | 18/02598-4 |
| Support type: | Scholarships in Brazil - Master |
| Effective date (Start): | October 01, 2018 |
| Effective date (End): | March 31, 2020 |
| Field of knowledge: | Engineering - Electrical Engineering - Electrical Materials |
| Cooperation agreement: | Coordination of Improvement of Higher Education Personnel (CAPES) |
| Principal Investigator: | Jose Alexandre Diniz |
| Grantee: | Lucas Barroso Spejo |
| Home Institution: | Centro de Componentes Semicondutores (CCS). Universidade Estadual de Campinas (UNICAMP). Campinas , SP, Brazil |
Abstract Mechanically stressed semiconductors present several physical properties that are of great interest for pure and applied sciences. These features are related to changes in their electrical, thermal and optical properties due to modifications in the material band diagram. Moreover, the fabrication techniques utilized to create stressed structures are of vital importance, as it presents a limiting factor to achieve high stress, stress uniformity, stress type (uniaxial, biaxial, compressive, tensile), as well as the need to use external actuators among other factors. In this sense, the enhancement of the electric mobility of carriers in stressed silicon has been widely investigated and applied in the industry of high-performance nanoelectronic devices (transistors), to extend Moore's law.Therefore, in this project it is intended to manufacture nanowires with uniaxial and uniform strain levels well above that used by the industry. This task will be performed in a controlled manner at the nanometer scale, without the use of external mechanical actuators and, with an industry-compatible process to yield a consistent method for the future transistor manufacturing. In addition, the investigation of carrier mobility at very high strain levels is intended to enable a technological breakthrough, thus being a step forward to the fabrication of the next generation high-performance nanowire-based transistors.Furthermore, the stressed nanowires fabricated in this work will be used to study the physical phenomena of giant piezoresistance in nanowires, which has been recently investigated by Rongrui Re et al. [1] and attracted significant attention from the scientific community due to its potential application in high-sensitive sensors and high-performance microelectronics. However, the physical phenomenon behind the giant piezoresistance remains unknown and requires better investigation, which is proposed in this work.In summary, we aim to obtain silicon nanowires for the investigation of the electric mobility of carriers, as well as the giant piezoresistance at mechanical stress levels higher than the values current presented in the literature. This is intended to be achieved with accurate control and without external actuators in a top-down process compatible with semiconductor industry.[1]R. He and P. Yang, "Giant piezoresistance effect in silicon nanowires," Nat. Nanotechnol., vol. 1, no. 1, pp. 42-46, 2006. | |