System for automatic hardware generation in FPGAs by Cartesian Genetic Programming
System for automatic hardware generation in FPGAs by Cartesian Genetic Programming
Implementation of a digital integrated circuits tester based on FPGA
Digital processing for electronic compensation in optical communications systems
Virtual reconfigurable architecture for image processing in real time
Artificial neural network implemented in FPGA using VHDL applied in mobile robots ...
Intelligent system for automatic generation of digital circuits in FPGA using the ...
Optical Interconection and Transmition Coherent Systems Technologies
| Grant number: | 09/08512-5 |
| Support type: | Scholarships in Brazil - Scientific Initiation |
| Effective date (Start): | August 01, 2009 |
| Effective date (End): | July 31, 2010 |
| Field of knowledge: | Engineering - Electrical Engineering |
| Principal Investigator: | Maximiliam Luppe |
| Grantee: | Gabriel Santos da Silva |
| Home Institution: | Escola de Engenharia de São Carlos (EESC). Universidade de São Paulo (USP). São Carlos , SP, Brazil |