Ricardo Menotti
CV Lattes
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ResearcherID
Universidade Federal de São Carlos (UFSCAR). Centro de Ciências Exatas e de Tecnologia (CCET) (Institutional affiliation for the last research proposal) Birthplace: Brazil
He holds a doctorate in Computer Science and Computational Mathematics at the University of São Paulo (2010), master in Computer Science and Computational Mathematics at the University of São Paulo (2005) and bachelor in Computer Science from the University of Oeste Paulista (2002). He is currently a professor at the Federal University of São Carlos. He has experience in computer science, with emphasis on Computer Architecture, Reconfigurable Computing and Compilers. (Source: Lattes Curriculum)
- An accelerator for deep neural convolutional networks implemented in FPGA, BP.IC
Abstract
With the evolution of High Performance Computing (HPC) began the popularization of many programs and algorithms that required high computational power, for example the deep neural convolutional network(DNCN). The DNCN, that are mostly used for image classification and recognition, achieved a peak of popularity with the triumph of the AlexNet in the ImageNet Large Scale Visual Recognitio...
- An LLVM based Back End compiler for accelerating applications on FPGAs, BP.IC
Abstract
FPGAs have become an interesting alternative to the acceleration of applications both in embedded systems and in high-performance computing. The main barrier to wider use of this technology is the difficulty to program these devices. This project aims to facilitate the automatic hardware generation from the intermediate representation of the LLVM compiler. Known techniques in our resear...
- A method to accelerate floating point algorithms in FPGAs, BP.IC
Abstract
FPGAs have proven to be efficient in terms of performance and power consumption for numerous applications, both in embedded systems and high performance computing. The main challenge for the more intensive use of this technology is the difficulty in programming these devices. To mitigate this problem, various applications are implemented in software using hardware executing on critical ...
(Only some records are available in English at this moment)
- Implementation of a convolutional layer using approximate multipliers in FPGA for convolutional neural networks, BE.EP.IC
Abstract
The evolution of High Performance Computing (HPC) allowed the popularization of many programs and algorithms that required high computational power, such as Convolutional Neural Networks (CNN). However, the requirement for higher accuracy in classification increased the number of layers used by these networks, thereafter raising the power consumption of the whole system. Min Soo Kim's P...
| 4 / 4 | Completed scholarships in Brazil |
| 1 / 1 | Completed scholarships abroad |
| 5 / 5 | All Scholarships |
| Associated processes | |
(References retrieved automatically from Web of Science and SciELO through information on FAPESP grants and their corresponding numbers as mentioned in the publications by the authors)
KIM, MIN SOO; DEL BARRIO, ALBERTO A.; OLIVEIRA, LEONARDO TAVARES; HERMIDA, ROMAN; BAGHERZADEH, NADER. Efficient Mitchell's Approximate Log Multipliers for Convolutional Neural Networks. IEEE TRANSACTIONS ON COMPUTERS, v. 68, n. 5, p. 660-675, MAY 2019. Web of Science Citations: 0. (18/00096-1)