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Bruna Cardoso Paz

CV Lattes


Fundação Educacional Inaciana Padre Sabóia de Medeiros (FEI). Centro Universitário da FEI (UNIFEI). Campus de São Bernardo do Campo  (Institutional affiliation for the last research proposal)
Birthplace: Brazil

Graduation (2012), master's (2015) and doctorate (2018) in Electrical Engineering at Centro Universitário FEI. Post-doc researcher at CEA-LETI, Grenoble, França, from 2018 to 2020. Currently post-doc researcher at CNRS - Institut Néel, Grenoble, França, acting on the following subjects: quantum computer, quantum dots, quantum bits, ultra low temperature, electrical characterization,FD SOI, advanced MOSFETs. (Source: Lattes Curriculum)

News published in Agência FAPESP Newsletter about the researcher
Scholarships in Brazil
Scholarships abroad
FAPESP support in numbers * Updated July 24, 2021
Total / Available in English
Most frequent collaborators in research granted by FAPESP
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Keywords used by the researcher
Scientific publications resulting from Research Grants and Scholarships under the grantee's responsibility (5)

(References retrieved automatically from Web of Science and SciELO through information on FAPESP grants and their corresponding numbers as mentioned in the publications by the authors)

Publications5
Citations11
Cit./Article2.2
Data from Web of Science

PAZ, BRUNA CARDOSO; CASSE, MIKAEL; BARRAUD, SYLVAIN; REIMBOLD, GILLES; VINET, MAUD; FAYNOT, OLIVIER; PAVANELLO, MARCELO ANTONIO. Electrical characterization of vertically stacked p-FET SOI nanowires. Solid-State Electronics, v. 141, p. 84-91, . Web of Science Citations: 3. (16/06301-0, 15/10491-7)

PAZ, BRUNA CARDOSO; CASSE, MIKAEL; BARRAUD, SYLVAIN; REIMBOLD, GILLES; VINET, MAUD; FAYNOT, OLIVIER; PAVANELLO, MARCELO ANTONIO. Methodology to separate channel conductions of two level vertically stacked SOI nanowire MOSFETs. Solid-State Electronics, v. 149, p. 62-70, . Web of Science Citations: 0. (15/10491-7)

PAZ, B. C.; CASSE, M.; BARRAUD, S.; REIMBOLD, G.; FAYNOT, O.; AVILA-HERRERA, F.; CERDEIRA, A.; PAVANELLO, M. A.. Drain current model for short-channel triple gate junctionless nanowire transistors. MICROELECTRONICS RELIABILITY, v. 63, p. 1-10, . Web of Science Citations: 4. (12/24377-3, 14/13816-1)

PAZ, BRUNA CARDOSO; CASSE, MIKAEL; BARRAUD, SYLVAIN; REIMBOLD, GILLES; VINET, MAUD; FAYNOT, OLIVIER; PAVANELLO, MARCELO ANTONIO. Study of silicon n- and p-FET SOI nanowires concerning analog performance down to 100 K. Solid-State Electronics, v. 128, n. SI, p. 60-66, . Web of Science Citations: 4. (15/10491-7)

PAZ, BRUNA CARDOSO; CASSE, MIKAEL; BARRAUD, SYLVAIN; REIMBOLD, GILLES; VINET, MAUD; FAYNOT, OLIVIER; PAVANELLO, MARCELO ANTONIO. Low temperature influence on performance and transport of Omega-gate p-type SiGe-on-insulator nanowire MOSFETs. Solid-State Electronics, v. 159, n. SI, p. 83-89, . Web of Science Citations: 0. (15/10491-7)

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