| Texto completo | |
| Autor(es): |
Ribeiro, Thales Augusto
;
Barraud, Sylvain
;
Bergamaschi, Flavio Enrico
;
Pavanello, Marcelo Antonio
;
IEEE
Número total de Autores: 5
|
| Tipo de documento: | Artigo Científico |
| Fonte: | 2020 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS); v. N/A, p. 4-pg., 2020-01-01. |
| Resumo | |
This work studied the effects of the fin width variation on Silicon-on-Insulator Junctionless Nanowire Transistors (JNTs) working in the temperature range of 300K to 500K. The effects of the temperature on the measured drain current, and gate capacitance, and on the extracted electrical parameters such as the threshold voltage, the subthreshold slope and the electron mobility were analyzed. Results show that JNTs with larger fin width may present better carrier mobility at a higher temperature than narrow ones as the degradation due to phonon scattering is decreased and the impurity scattering becomes more relevant. It is demonstrated that JNTs with narrow fin width show higher phonon scattering and higher mobility variation with the temperature than wider ones. (AU) | |
| Processo FAPESP: | 16/10832-1 - Avaliação e modelagem do transporte de carga em transistores mos nanométricos para projeto de circuitos cmos |
| Beneficiário: | Thales Augusto Ribeiro |
| Modalidade de apoio: | Bolsas no Brasil - Doutorado |
| Processo FAPESP: | 19/15500-5 - Simulação atomística das propriedades elétricas de nanofios transistores MOS |
| Beneficiário: | Marcelo Antonio Pavanello |
| Modalidade de apoio: | Auxílio à Pesquisa - Regular |