Silicene-Based FET for Logical Technology

Autor(es)

Lima, Matheus Paes ^[1] ; Fazzio, Adalberto ^[2] ; Roque da Silva, Antonio Jose ^{[3, 4]}

Afiliação do(s) autor(es)

^[1] Univ Fed Sao Carlos, Dept Phys, BR-13565905 Sao Carlos, SP - Brazil

^[2] Brazilian Nanotechnol Natl Lab, BR-13083970 Campinas, SP - Brazil

^[3] Univ Sao Paulo, Inst Fis, BR-05315970 Sao Paulo - Brazil

^[4] Lab Nacl Luz Sincrotron, BR-13083970 Campinas, SP - Brazil

• Tipo de documento: Artigo Científico
• Fonte: IEEE ELECTRON DEVICE LETTERS; v. 39, n. 8, p. 1258-1261, AUG 2018.
• Citações Web of Science: 2

Resumo

2-D materials are considered to have great potential to integrate future generations of nanoelectronic devices aiming to outperform the limitations that will eventually reach the conventional silicon technology. In this letter, a field-effect transistor composed by half-hydrogenated-silicene (HHS) connected to pristine silicene regions is theoretically investigated. Using ab-initio ballistic transport simulations based on DFT, it is shown that this device has an extremely high I-ON/I-OFF ratio, for very small bias voltages and for channel lengths smaller than 10 nm. In particular, an expression for I-ON/I-OFF = exp [{[}3.35 angstrom(-1)] w] is obtained, wherew is the channel length. Finally, we demonstrated that the peculiar electronic structure of the HHS allows a fine-tuning of the charge transport mechanism resulting in ultra-low values for the subthreshold slope close to 24.5 meV /dec, which overcomes the inferior limit of 60 meV /dec claimed for conventional devices. (AU)

• Processo FAPESP: 17/02317-2 - Interfaces em materiais: propriedades eletrônicas, magnéticas, estruturais e de transporte
• Beneficiário: Adalberto Fazzio
• Modalidade de apoio: Auxílio à Pesquisa - Temático