Evaluating Soft Core RISC-V Processor in SRAM-Based FPGA Under Radiation Effects

Autor(es)

de Oliveira, Adria B. ^[1] ; Tambara, Lucas A. ^{[1, 2]} ; Benevenuti, Fabio ^[1] ; Benites, Luis A. C. ^[1] ; Added, Nemitala ^[3] ; Aguiar, Vitor A. P. ^[3] ; Medina, Nilberto H. ^[3] ; Silveira, Marcilei A. G. ^[4] ; Kastensmidt, Fernanda L. ^[1]

Afiliação do(s) autor(es)

^[1] Univ Fed Rio Grande Sul UFRGS, BR-90040060 Porto Alegre, RS - Brazil

^[2] Cobham Gaisler AB, S-41119 Gothenburg - Sweden

^[3] Univ Sao Paulo, BR-05508220 Sao Paulo - Brazil

^[4] Ctr Univ FEI, BR-0985090 Sao Bernardo Do Campo - Brazil

• Tipo de documento: Artigo Científico
• Fonte: IEEE Transactions on Nuclear Science; v. 67, n. 7, p. 1503-1510, JUL 2020.
• Citações Web of Science: 0

Resumo

This article evaluates the RISC-V Rocket processor embedded in a Commercial Off-The-Shelf (COTS) SRAM-based field-programmable gate array (FPGA) under heavy-ions-induced faults and emulation fault injection. We also analyze the efficiency of using mitigation techniques based on hardware redundancy and scrubbing. Results demonstrated an improvement of 3x in the cross section when scrubbing and coarse grain triple modular redundancy are used. The Rocket processor presented analogous sensitivity to radiation effects as the state-of-the-art soft processors. Due to the complexity of the system-on-chip, not only the Rocket core but also its peripherals should be protected with proper solutions. Such solutions should address the specific vulnerabilities of each component to improve the overall system reliability while maintaining the trade-off with performance. (AU)

• Processo FAPESP: 12/03383-5 - Desenvolvimento de metodologia de ensaios de radiação em componentes eletrônicos
• Beneficiário: Nilberto Heder Medina
• Modalidade de apoio: Auxílio à Pesquisa - Regular