| Texto completo | |
| Autor(es): |
Costa, Fernando J.
;
Trevisoli, Renan
;
Capovilla, Carlos Eduardo
;
Doria, Rodrigo T.
;
IEEE
Número total de Autores: 5
|
| Tipo de documento: | Artigo Científico |
| Fonte: | 2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022); v. N/A, p. 4-pg., 2022-01-01. |
| Resumo | |
The main objective of this work is to present an analysis of the performance of UTBB SOI transistors working as standard diodes, where the implementation of ground planes and substrate bias are analyzed. It is shown a reduced leakage current and increased ratio between the on and off-state currents with the substrate bias at -2 V and with a P-type GP implemented. However, both conditions result in increased threshold voltage. (AU) | |
| Processo FAPESP: | 19/15500-5 - Simulação atomística das propriedades elétricas de nanofios transistores MOS |
| Beneficiário: | Marcelo Antonio Pavanello |
| Modalidade de apoio: | Auxílio à Pesquisa - Regular |