Analysis of Bulk and Accumulation Mobilities in n- and p-type Triple Gate Junctionless Nanowire Transistors

Autor(es)

Ribeiro, T. A. ; Pavanello, M. A. ; Cerdeira, A. ; IEEE

• Tipo de documento: Artigo Científico
• Fonte: 2017 32ND SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO): CHIP ON THE SANDS; v. N/A, p. 4-pg., 2017-01-01.

Resumo

This paper studies the effective mobility in n- and p-type junctionless nanowire transistors (JNT) with variable fin width from quasi-planar to nanowire devices. JNTs electrical parameters were analyzed and the results show that smaller fin width have higher mobility while the mobility decreases for quasi-planar devices. Simulations were used to analyze the mobility showing that small fin devices reach higher mobility for smaller gate bias variation above the threshold voltage and a higher mobility in the middle of the channel due to the better electrostatic coupling compared to larger devices. (AU)

• Processo FAPESP: 16/10832-1 - Avaliação e modelagem do transporte de carga em transistores mos nanométricos para projeto de circuitos cmos
• Beneficiário: Thales Augusto Ribeiro
• Modalidade de apoio: Bolsas no Brasil - Doutorado