Operations with Structured Sparse Matrices and their Integration into the RISC-V Architecture

• Grant number: 24/17401-2
• Support Opportunities: Scholarships in Brazil - Scientific Initiation
• Start date: November 01, 2024
• End date: October 31, 2025
• Field of knowledge: Physical Sciences and Mathematics - Computer Science - Computer Systems
• Principal Investigator: Guido Costa Souza de Araújo
• Grantee: Luc Joffily Ribas
• Host Institution: Instituto de Computação (IC). Universidade Estadual de Campinas (UNICAMP). Campinas , SP, Brazil

Abstract

Structured sparse matrices are common in various fields of knowledge, from neural network acceleration and compression to numerical solutions of partial differential equations. The vast majority of applications that use sparse matrices in their operations (e.g., neural networks) involve large volumes of data, which result in long computation times. Although there are algorithms for sparse matrix computation, they are either specific to a certain level of sparsity or are not fast enough to handle very large matrices. Therefore, the use of hardware accelerators to optimize basic operations such as sparse-dense matrix multiplication and matrix-vector multiplication becomes pertinent.The goal of this project is to create efficient algorithms for these operations that can be integrated into matrix multiplication accelerators in the RISC-V architecture, an architecture that is becoming a reference for CPU design. In this project, memory alignment methods will be evaluated to make the most of processing power, as well as a sparsity standard that can eventually be implemented in hardware.