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Danian: tail latency reduction of networking application through an O(1) scheduler

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Author(s):
Pantuza, Gustavo ; Bleme, Lucas A. C. ; Vieira, Marcos A. M. ; Vieira, Luiz F. M. ; IEEE
Total Authors: 5
Document type: Journal article
Source: 26TH IEEE SYMPOSIUM ON COMPUTERS AND COMMUNICATIONS (IEEE ISCC 2021); v. N/A, p. 6-pg., 2021-01-01.
Abstract

Core allocation for application threads is a problem of reasonable complexity and computational cost inside Unix systems. Caladan scheduler is a solution aiming to reduce the cost of how threads and cores are allocated in microsecond scale. The Danian system optimizes through memoization the thread picking algorithm that picks the best thread for a given core. Such improvements have direct impact on applications distributed across networks on a data center. Thread picking operation cost dropped from O(n) to O(1), the CPU time reduced 7%, the tail latency reduced 3% on Caladan Synthetic experiment and 5% on the Netperf experiment. (AU)

FAPESP's process: 18/23085-5 - ProgNet: networks with programmable data plane
Grantee:Marcos Augusto Menezes Vieira
Support Opportunities: Regular Research Grants