| Grant number: | 19/01110-0 |
| Support Opportunities: | Scholarships abroad - Research Internship - Doctorate |
| Start date: | March 31, 2019 |
| End date: | March 30, 2020 |
| Field of knowledge: | Physical Sciences and Mathematics - Computer Science - Computer Systems |
| Principal Investigator: | Guido Costa Souza de Araújo |
| Grantee: | João Paulo Labegalini de Carvalho |
| Supervisor: | José Nelson Amaral |
| Host Institution: | Instituto de Computação (IC). Universidade Estadual de Campinas (UNICAMP). Campinas , SP, Brazil |
| Institution abroad: | University of Alberta, Canada |
| Associated to the scholarship: | 16/15337-9 - Distributed Transactional Memories and Efficient Data Distribution Models to Speed-up Irregular Data Structure Intensive Applications, BP.DR |
Abstract The staggering speed in which data has been created in the past decade brought a pressing need to efficiently store, and more importantly, extract valuable and accurate information from it. Machine Learning (ML) took the lead of the former due to the great speedup results obtained with General-Purpose Graphics Processors. However, some application domains still lack good ML solutions and for such challenging cases the consensus solution is to design specialized hardware support. Specialized hardware provides tailored computing devices which are, by design, a better fit for the demands of the target domain. However, their adoption might require specific knowledge unrelated to the programmer's expertise, and be costly due to the need of code rewriting and re-tuning. In order to reduce the risks of specialized hardware only be used by their target domain, and requiring hardware vendors to provide and maintain a plethora of products for each niche markets, it is highly desirable for such hardware to also be suited for instances of general computing problems (e.g. linear algebra). In this direction, this project aims to ease the adoption of specialized hardware originally tailored for ML in the context of general-purpose computing. One of its main goals is to create novel code analysis to obtain meaningful information concerning how an application could benefit from the available hardware primitives. The design of new representations of code properties that accurately capture and guide the mapping of computing structures to hardware primitives is also a goal of the project. (AU) | |
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