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| Author(s): |
Bruno Chinelato Honorio
Total Authors: 1
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| Document type: | Master's Dissertation |
| Press: | São José do Rio Preto. 2018-09-20. |
| Institution: | Universidade Estadual Paulista (Unesp). Instituto de Biociências Letras e Ciências Exatas. São José do Rio Preto |
| Defense date: | 2018-08-09 |
| Advisor: | Alexandro José Baldassin |
| Abstract | |
Transactional Memory (TM) allows programmers to utilize the concept of transaction for writing concurrent code. In this context, a transactioncan be extended as a block of instructions that is executed atomically and isolated, that is, the intermediate states of the processing of a transaction can not be seen by the other transactions. Although initially confined to the academic field, TM is becoming more popular. An evidence of this is the addition of transactional hardware to the new processors from Intel and IBM, as well as the support for transactional code provided by compilers such as GCC. The biggest advantage to the transactional model is the bigger level of abstraction provided to the programmer, making the process of writing parallel code easier, as well as avoiding famous synchronization errors caused by traditional locks, such as the deadlock problem. Unfortunately, the software support for execution of transaction still does not provide a good performance. In particular, transactional code, produced by compilers and the associated runtime system, can still be considered inefficient. This thesis performs an up-to-date study of the GCC transactional code generation and with the objective to find where the main performance losses are coming from. The study done indicates that one of the main sources of inefficiency is the read and write barriers inserted by the compiler. The problem of this instrumentation is that the compiler cannot determine, at compile time, if a memory region will be accessed concurrently or not, forcing the compiler to take a pessimist approach and instrument this memory region. This phenomenom is called Over-instrumentation. To overcome these limitations, this thesis proposes a new language construct through a new pragma clause that allows programmers to specify which memory regions do not need to be instrumented. To validade the new pragma clause, this thesis conducted experiments using the STAMP benchmark suite, composed of transactional applications. The obtained results show a great performance gain for applications that used the proposed pragma, with them being up to 7.2x faster than the original code generated by GCC. (AU) | |
| FAPESP's process: | 16/12103-7 - Improving performance and debugging of transactional applications through programmer annotations |
| Grantee: | Bruno Chinelato Honorio |
| Support Opportunities: | Scholarships in Brazil - Master |