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| Author(s): |
Leonardo Scanferla Amaral
Total Authors: 1
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| Document type: | Master's Dissertation |
| Press: | Campinas, SP. |
| Institution: | Universidade Estadual de Campinas (UNICAMP). Instituto de Computação |
| Defense date: | 2009-09-12 |
| Examining board members: |
Guido Costa Souza de Araújo;
Nahri Balesdent Moreano;
Ricardo Dahab
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| Advisor: | Guido Costa Souza de Araújo |
| Abstract | |
Identity-Based Cryptography has been gradually accepted as an effective way of implementing asymmetric cryptography. The calculation of cryptographically-suitable pairings is crucial for the performance of pairing based protocols. In this work we present a comparative study of hardware implementation techniques for computing the r\T pairing over the finite field F3m using a low-cost platform based on then Altera Nios II processor. Using code profiling we identify critical field operations which concentrate most of the execution time; these operations were implemented as specialized FPGA instructions/modules and added to the processor. The specialized processor was synthesized and the application was tailored to the new hardware. Experimental results show that a considerable speedup can be achieved when compared to the baseline software-only approach. Moreover, we show that such Hardware/Software co-design approach is competitive with other solutions (AU) | |