Graduated in Electronic and Telecommunications Engineering from Unesp - 'Universidade Estadual Paulista Júlio de Mesquita Filho', São João da Boa Vista Campus. Holds a Technical degree in Electronics from ETEC - Centro Paula Souza. Was a member of GCO Engenharia as an intern (2019) in the area of programming and circuit development. During his undergraduate studies, he developed two scientific initiation projects funded by FAPESP: 'Study and electrical characterization of triple-gate SOI MOSFET transistors (SOI FinFETs)' and 'Application of triple-gate SOI MOSFET transistors (SOI FinFETs) in analog circuits.' Has experience in Electrical Engineering, with an emphasis on Electronic Circuits, mainly working on the following topics: semiconductors, nanoelectronics, and transistors. Currently pursuing a master's degree in Electrical Engineering in the field of nanoelectronics at FESJ-UNESP. (Source: Lattes Curriculum)
| News published in Agência FAPESP Newsletter about the researcher |
| More itemsLess items |
| TITULO |
| Articles published in other media outlets ( ): |
| More itemsLess items |
| VEICULO: TITULO (DATA) |
| VEICULO: TITULO (DATA) |
With the advancement of integrated circuit manufacturing technology, the devices scaling makes difficult the controlling the charges in the channel region of the conventional MOS transistor. The SOI transistor (Silicon-On-Insulator) multi-gate MOSFETs, also called as FinFET transistors, appear as an alternative to planar transistors due to better electrostatic coupling between gate and ch…
| 1 / 1 | Completed scholarships in Brazil |
| Associated processes | |
CV Lattes
ORCID