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Study and Electrical Characterization of triple gate SOI MOSFETs (SOI FinFETs).

Grant number: 22/09917-3
Support Opportunities:Scholarships in Brazil - Scientific Initiation
Effective date (Start): November 01, 2022
Effective date (End): October 31, 2024
Field of knowledge:Engineering - Electrical Engineering - Electrical, Magnetic and Electronic Measurements, Instrumentation
Principal Investigator:Paula Ghedini Der Agopian
Grantee:Pedro Henrique Madeira
Host Institution: Faculdade de Engenharia. Universidade Estadual Paulista (UNESP). Campus Experimental São João da Boa Vista. São João da Boa Vista , SP, Brazil


With the advancement of integrated circuit manufacturing technology, the devices scaling makes difficult the controlling the charges in the channel region of the conventional MOS transistor. The SOI transistor (Silicon-On-Insulator) multi-gate MOSFETs, also called as FinFET transistors, appear as an alternative to planar transistors due to better electrostatic coupling between gate and channel, causing better control of channel charges and consequently greater immunity to short channel effects.One of the important applications of advanced integrated circuits is their use in high-performance processors and circuits. However, the study of the analog potential of this technology also needs to be considered.In this scientific initiation project, the theoretical and experimental study of FinFETs transistors with different fin widths will be carried out, investigating the electrostatic coupling between the gates and the channel. The performance of triple gate FinFET transistors will be evaluated from the main analog and digital DC parameters, such as threshold voltage, subthreshold slope, transconductance, output conductance, transistor efficiency, Early voltage and intrinsic voltage gain. The study of a technology not covered in the undergraduate course, as well as the precise electrical measurements together with the study of this wide range of parameters, will give to the student a knowledge that goes far beyond that presented to him at the undergraduate level.It is also worth mentioning that this study is viable because in addition to the advisor having a lot of experience in the subject, the student who will develop it has shown great potential for research in addition to having excellent school performance. The advisor is based on the knowledge acquired during the manufacture of the first 3D transistor in Brazil (FAPESP-Temático 2008/05792-4) and also with the partnership with Imec, in Belgium, where the transistors that will be evaluated in this project were manufactured.

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