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Effect of mechanical strain in multiple gate transistors operating in cryogenic temperatures

Grant number: 07/06176-2
Support Opportunities:Scholarships in Brazil - Master
Effective date (Start): March 01, 2008
Effective date (End): February 28, 2010
Field of knowledge:Engineering - Electrical Engineering - Electrical Materials
Principal Investigator:Marcelo Antonio Pavanello
Grantee:Renan Trevisoli Doria
Host Institution: Centro Universitário FEI (UNIFEI). Campus de São Bernardo do Campo. São Bernardo do Campo , SP, Brazil

Abstract

Double-gate transistors constitutes one of the most promising structures for solving the problems caused by the continuous downscaling of dimensions, thanks to the improvements on the performance of deep-submicrometer MOSFETs, with channel length shorter than 100 nm. More recently, using the concept of double-gate transistors, multiple-gate structures have been proposed, thanks to the excellent control on the channel charges by the gate electrode.THe use of controlled mechanical strain on the channel region of MOSFETs is an artifice largely adopted to improve the carrier mobility and consequently the drive current. Several works reported its use in SOI MOSFETs, mainly focusing digital application. On the other hand, the effect of strain in multiple-gate transistors still weakly explored and reported.In this work a comparative study on the performance of multiple-gate transistors as a function of temperature, in the range of 80 K up to 300 K, with and without the presence of mechanical strain in the channel region, combining the improvements given by the strain application with those caused by the temperature reduction. (AU)

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