Optimization of the Dual-Technology Back-Enhanced Field Effect Transistor

Author(s)

Mori, C. A. B. ; Agopian, P. G. D. ; Martino, J. A. ; IEEE

• Document type: Journal article
• Source: 2020 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS); v. N/A, p. 4-pg., 2020-01-01.

Abstract

In this paper we optimize the Dual-Technology Back-Enhanced SOI (DT (SOI)-S-BE) FETs varying the thickness of gate oxide, silicon film and buried oxide focusing on transfer characteristics. The DT (SOI)-S-BE optimization takes into account its behavior as both nMOS and pTunnel-FET device, which are obtained through the variation of positive and negative back biases. In the studied range, the optimized results were t(ox)=1nm, t(si) = 10nm and t(BOX) = 20nm. These DT (SOI)-S-BE results are compared with the conventional nMOS and pTFET devices. (AU)

• FAPESP's process: 19/23283-4 - Low-frequency noise measurements on SOI FinFETs operating as biosensitive elements
• Grantee: Carlos Augusto Bergfeld Mori
• Support Opportunities: Scholarships abroad - Research Internship - Doctorate
• FAPESP's process: 17/26489-7 - Project and fabrication of a BE SOI Tunnel-FET as biosensitive element
• Grantee: Carlos Augusto Bergfeld Mori
• Support Opportunities: Scholarships in Brazil - Doctorate