Influence of Technological and Geometrical Parameters on the Performance of Graded...
Integrated amplifier design using 130 nm SOI CMOS technology.
1) behavior of the graded-channel fully-depleted soi nmosfet in subthreshold regim...
Study of the transistors electrical behavior of 130 nm SOI CMOS technology for app...
Early voltage behavior in circular gate soi nmosfet using 0.13 um partially-deplet...
Harmonic distortion comparison between circular gate and conventional soi nmosfet ...