Optimization techniques for instruction issue targeting processor energy efficiency

• Grant number: 12/17278-9
• Support Opportunities: Scholarships in Brazil - Master
• Start date: February 01, 2013
• End date: February 28, 2014
• Field of knowledge: Physical Sciences and Mathematics - Computer Science - Computer Systems
• Principal Investigator: Guido Costa Souza de Araújo
• Grantee: Rodolfo Guilherme Wottrich
• Host Institution: Instituto de Computação (IC). Universidade Estadual de Campinas (UNICAMP). Campinas , SP, Brazil

Abstract

The evolution of techniques in the area of computer architecture goes on not only according to the application execution performance gain, but also guided by constraints like chip area, energy efficiency and heat dissipation. The focus on the machine's energy efficiency has got special importance through the last few years because of the "power wall", the fact that the growing on-chip transistor density caused problems like too much heat dissipation and leakage, driving the development focus of new machines to the replication of cores instead of clock frequency increment. It's been shown that, in general, more than 40% of a processor's power consumption is due to the initial processing stages, like instruction fetching and dispatching instructions to the functional units, what suggests that improvements in these initial stages would heavily impact the general power consumption. This work intends to implement an optimization in the schedule and dispatch mechanism of superscalar processors, so the instruction fetch, decode and rename stages become unnecessary in case of hot, highly repetitive code. An important part of the beginning of the project will be the choice of an adequate simulator which has the necessary characteristics for the intended optimization implementation. With a good out-of-order processor model for simulation, great results regarding energy efficiency are expected. (AU)

Academic Publications

(References retrieved automatically from State of São Paulo Research Institutions)

WOTTRICH, Rodolfo Guilherme. Paralelização de laços na nuvem usando OpenMP e MapReduce. 2014. Master's Dissertation - Universidade Estadual de Campinas (UNICAMP). Instituto de Computação Campinas, SP.