Power-performance optimization in hybrid reconfigurable multicore architectures

• Grant number: 11/10163-9
• Support Opportunities: Scholarships in Brazil - Doctorate
• Effective date (Start): September 01, 2011
• Effective date (End): August 31, 2015
• Field of knowledge: Physical Sciences and Mathematics - Computer Science - Computer Systems
• Principal Investigator: Vanderlei Bonato
• Grantee: Bruno de Abreu Silva
• Host Institution: Instituto de Ciências Matemáticas e de Computação (ICMC). Universidade de São Paulo (USP). São Carlos , SP, Brazil

Abstract

In embedded systems, energy efficiency is the new fundamental performance limiter. Considering that, many techniques were applied at different development levels, such as co-design, compilers, schedulers, run-time management, and applications. The fusion of techniques from different levels has also been exploited to increase the optimizationopportunities. In this proposal, we present a tool to exploit power/performance optimization techniques in FPGA-based heterogeneous single-ISA multi-core systems. The tool performs optimizations in two phases: compilation and execution. In compilation, are generated from a compiler the hardware and software configurations of a multi-core architecture based on LEON3 processor. During execution, information about application properties, available hardware resources, and system behavior is used to do thread scheduling, clock gating, and dynamic frequency scaling (DFS). (AU)

Scientific publications

(References retrieved automatically from Web of Science and SciELO through information on FAPESP grants and their corresponding numbers as mentioned in the publications by the authors)

SILVA, BRUNO DE ABREU; CUMINATO, LUCAS A.; DELBEM, ALEXANDRE C. B.; DINIZ, PEDRO C.; BONATO, VANDERLEI. Application-oriented cache memory configuration for energy efficiency in multi-cores. IET COMPUTERS AND DIGITAL TECHNIQUES, v. 9, n. 1, p. 73-81, JAN 2015. (11/10163-9)

Academic Publications

(References retrieved automatically from State of São Paulo Research Institutions)

SILVA, Bruno de Abreu. A method to optimize performance/energy consumption relation for heterogeneous multi-core architectures on FPGA. 2016. Doctoral Thesis - Universidade de São Paulo (USP). Instituto de Ciências Matemáticas e de Computação (ICMC/SB) São Carlos.