Techniques for compiling software into FPGAs

• Grant number: 14/20682-1
• Support Opportunities: Research Grants - Visiting Researcher Grant - International
• Duration: April 21, 2015 - May 07, 2015
• Field of knowledge: Physical Sciences and Mathematics - Computer Science - Computing Methodologies and Techniques
• Principal Investigator: Eduardo Marques
• Grantee: Eduardo Marques
• Visiting researcher: João Manuel Paiva Cardoso
• Visiting researcher institution: Universidade do Porto (UP), Portugal
• Host Institution: Instituto de Ciências Matemáticas e de Computação (ICMC). Universidade de São Paulo (USP). São Carlos , SP, Brazil

Abstract

The use of reconfigurable computing architectures are increasingly important, manifesting itself in a variety of systems, from the computing systems up to high performance embedded systems. The dominant technology for implementation of reconfigurable architectures have been provided by FPGAs1, devices that are based on a matrix of cells surrounded with logical drives resource interconnection, both programmable (reconfigurable). The ability of these Device for improving the performance of applications and to provide relations performance / power consumption often more effective than achieved by other devices used to accelerate applications (eg, GPUs2) makes extremely attractive and increasingly popular. However, the programming of same remains quite time consuming task, requiring a knowledge advanced development of digital hardware, facts which tend to limit their applicability and use, especially in areas with times of introduction Reduced market. However, the scientific community has been focusing efforts in order to alleviate this problem. Current solutions include the use compilers the designated hardware, most of which focus on the conversion program in "C" gates, which are based on synthesis techniques high-level. This project will analyze the techniques used and the necessary optimizations to mapping computations on reconfigurable hardware automatically and efficiently, the challenges and trends, ranging from the use of specific programming languages the domain (DSLs3) to use aggressive techniques of compilers. (AU)