FPGAs have become an interesting alternative to the acceleration of applications both in embedded systems and in high-performance computing. The main barrier to wider use of this technology is the difficulty to program these devices. This project aims to facilitate the automatic hardware generation from the intermediate representation of the LLVM compiler. Known techniques in our research group will be used to build an efficient hardware pipeline from code sections previously selected in programs written in C. The DE2i-150 kit, which combines an Intel processor and Altera Cyclone IV FPGA, will be used as a platform to test a set of applications with code sections accelerated by hardware.
News published in Agência FAPESP Newsletter about the scholarship: