Scholarship 22/03275-0 - Robôs móveis, Aprendizagem profunda - BV FAPESP
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FPGA-based deep neural network for mobile Robotics application

Grant number: 22/03275-0
Support Opportunities:Scholarships in Brazil - Scientific Initiation
Start date until: May 01, 2022
End date until: February 28, 2023
Field of knowledge:Physical Sciences and Mathematics - Computer Science - Computer Systems
Principal Investigator:José Eduardo Cogo Castanho
Grantee:Lucas Flavio Reis Mazzetto
Host Institution: Faculdade de Engenharia (FE). Universidade Estadual Paulista (UNESP). Campus de Bauru. Bauru , SP, Brazil

Abstract

Deep neural networks are suitable for solving several problems, but these machine-learning models have a high computational cost. Graphics Processing Units (GPUs), which are suitable for the calculations performed by these algorithms, or cloud computing services, which can do the processing remotely by sending data through the Internet, are used to overcome the drawbacks. However, the excessive energy consumption and latency typical of such solutions can be limiting for some applications, such as mobile robots and embedded systems. Alternatively, deep neural networks can run on processors specially developed for this purpose. The Field Programmable Gate Array (FPGA) devices have great potential for this goal, as their characteristics are low energy consumption and high computational power. However, they are less used due to limited resources, such as low memory, low operating frequency, and the complexity of implementing neural network models in the available hardware. This research project aims to investigate the use of FPGA, with experiments, to evaluate the feasibility of different techniques for implementing Deep Neural Network models within the context of their application in mobile robots. The computational performance and other parameters of an FPGA-based solution will be compared against other computational systems usually employed in embedded systems. The project also has the goal of investigating and mastering the set of techniques necessary for the development of FPGA-based embedded systems.(AU)

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