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| Author(s): |
Marcus Bartholomeu
Total Authors: 1
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| Document type: | Doctoral Thesis |
| Press: | Campinas, SP. |
| Institution: | Universidade Estadual de Campinas (UNICAMP). Instituto de Computação |
| Defense date: | 2005-11-11 |
| Examining board members: |
Rodolfo Jardim de Azevedo;
Luiz Claudio Villar dos Santos;
Hans Jorg Andreas Schneebeli;
Paulo Cesar Centoducatte;
Ricardo Pannain
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| Advisor: | Guido Costa Souza de Araújo; Rodolfo Jardim de Azevedo |
| Abstract | |
The simuIator is one of the most important tools to design a new computer architecture. It has many advantages, the most important are flexibility and Iow cost. The first simulators were created manually, which was an error-prone practice. Nowadays, Architecture Description Languages (ADLs) simplifies the generation of these tools. This work focus on the research of new fast simulation techniques using the ArchC ADL. Beginning from the state-of-art in this area, the compiled simulation, is was possible to speed-up the instruction set simulation performance even higher. Two optimizations were proposed. The first one simulates basic blocks atomically, without any condition test between instructions, and speed-up the simuIation by 70% in average. The second optimization anticipates the majority of target address calculation for jump instructions, allowing the flow control to be done by the simuIator. This second optimization is an improvement to the first one, and provides an speed-up of 180% in average. Besides the research of fast simuIation techniques, a methodology was created to allow architecture simulators to interact with the host machine, which makes it possible, for example, to access local files and take options from command-line. Also, an interface were defined to access external data which allows a propotype imIementation of a multiprocessar architecture simulator. This interface will be integrated to ArchC to achieve co-simulation capability for generic blocks described in SystemC (AU) | |