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Universidade de São Paulo (USP). Escola Politécnica (EP) (Institutional affiliation from the last research proposal) Birthplace: Brazil
Bachelor's in Electric Engineering from University of Sao Paulo (2010). Master's in Electric Engineering from University of São Paulo (2013). PhD in Electric Engineering (micro-nanoelectronic) at University of Sao Paulo (2016) with internship in micro-nanoelectronic at MINATEC, Grenoble, France (2015). Post-doctoral from University of Sao Paulo (2020) in micro-nanoelectronic (transistor fabrication process) and from Sao Paulo State University (2022) in nano-microelectronic (biossensing application). She has experience in Electric Engineering, focusing on Semiconductor Materials and Devices, acting on the following subjects: BE SOI MOSFET and UTBB SOI MOSFET transistors and 1T-DRAM (FBRAM) memory. (Source: Lattes Curriculum)
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In order to overcome the current limits for the devices' scaling, UTBB SOI MOSFET (Ultra-Thin-Body-and-Buried-oxide Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect-Transistor) technology combined with the dynamic threshold voltage technique has been considered as a possible solution to reduce short channel effects and further improve the performance of these transistors. This …
In order to overcome the current limits for the devices' scaling, UTBB SOI MOSFET (Ultra-Thin-Body-and-Buried-oxide Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect-Transistor) technology combined with the dynamic threshold voltage technique has been studied as a possible solution to reduce short channel effects and further improve the performance of these transistors. This is …
| 1 / 1 | Completed scholarships in Brazil |
| 1 / 1 | Completed scholarships abroad |
| 2 / 2 | All Scholarships |
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