Study of SOI MOSFETs transistors with ultra-thin silicon film body and buried oxide at high temperatures

• Grant number: 13/13690-5
• Support Opportunities: Scholarships in Brazil - Doctorate
• Effective date (Start): October 01, 2013
• Effective date (End): October 29, 2016
• Field of knowledge: Engineering - Electrical Engineering
• Principal Investigator: João Antonio Martino
• Grantee: Katia Regina Akemi Sasaki
• Host Institution: Escola Politécnica (EP). Universidade de São Paulo (USP). São Paulo , SP, Brazil
• Associated research grant: 08/05792-4 - Design, fabrication and characterization of FinFET transistors, AP.TEM
• Associated scholarship(s): 14/13664-7 - Floating body and coupling effects in ultrathin body and buried oxide FDSOI MOSFETs, BE.EP.DR

Abstract

In order to overcome the current limits for the devices' scaling, UTBB SOI MOSFET (Ultra-Thin-Body-and-Buried-oxide Silicon-on-Insulator Metal-Oxide-Semiconductor Field-Effect-Transistor) technology combined with the dynamic threshold voltage technique has been considered as a possible solution to reduce short channel effects and further improve the performance of these transistors. This is due to a better back gate coupling associated with the advantage of obtaining a higher ON state current with a lower OFF state current. Several areas such as in aerospace and military applications or even the automobile industry and the exploitation of energy, require a study of devices that operate properly at high temperatures. Thus, this work aims to study the influence of temperature on devices UTBB SOI MOSFET in conventional mode and with the dynamic threshold voltage technique. These devices are available at the University of São Paulo and other more advanced ones can be provided through a research internship in Belgium. It will be studied the main electrical parameters (digital and analog), from experimental data and from 2D static and dynamic simulations. A comparison between theirs behaviors at room and high temperatures is performed as well as between the conventional mode (the back gate voltage independent of the gate voltage) and dynamic threshold voltage mode. (AU)

Academic Publications

(References retrieved automatically from State of São Paulo Research Institutions)

SASAKI, Katia Regina Akemi. Study of SOI MOSFETs transistors with ultrathin silicon layer and buried oxide in dynamic threshold voltage mode operation.. 2016. Doctoral Thesis - Universidade de São Paulo (USP). Escola Politécnica (EP/BC) São Paulo.