| Full text | |
| Author(s): |
Salamanca, Juan
;
Amaral, Jose Nelson
;
Araujo, Guido
;
Rivera, FF
;
Pena, TF
;
Cabaleiro, JC
Total Authors: 6
|
| Document type: | Journal article |
| Source: | EURO-PAR 2017: PARALLEL PROCESSING; v. 10417, p. 15-pg., 2017-01-01. |
| Abstract | |
Thread-Level Speculation (TLS) is a hardware/software technique that enables the execution of multiple loop iterations in parallel, even in the presence of some loop-carried dependences. TLS requires hardware mechanisms to support conflict detection, speculative storage, in-order commit of transactions, and transaction roll-back. There is no off-the-shelf processor that provides direct support for TLS. Speculative execution is supported, however, in the form of Hardware Transactional Memory (HTM)-available in recent processors such as the Intel Core and the IBM POWER8. Earlier work has demonstrated that, in the absence of specific TLS support in commodity processors, HTM support can be used to implement TLS. This paper presents a careful evaluation of the implementation of TLS on the HTM extensions available in such machines. This evaluation provides evidence to support several important claims about the performance of TLS over HTM in the Intel Core and the IBM POWER8 architectures. Experimental results reveal that by implementing TLS on top of HTM, speed-ups of up to 3.8x can be obtained for some loops. (AU) | |
| FAPESP's process: | 13/08293-7 - CCES - Center for Computational Engineering and Sciences |
| Grantee: | Munir Salomao Skaf |
| Support Opportunities: | Research Grants - Research, Innovation and Dissemination Centers - RIDC |
| FAPESP's process: | 15/04285-5 - Speculative code execution for multicore architectures |
| Grantee: | Juan Jesús Salamanca Guillén |
| Support Opportunities: | Scholarships in Brazil - Doctorate (Direct) |
| FAPESP's process: | 15/12077-3 - Speculative code execution for multicore architectures |
| Grantee: | Juan Jesús Salamanca Guillén |
| Support Opportunities: | Scholarships abroad - Research Internship - Doctorate (Direct) |