Research and Innovation: Design and interactive optimization tool for integrated circuits based on computational intelligence
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Design and interactive optimization tool for integrated circuits based on computational intelligence

Abstract

The design of analog integrated circuits (ICs) is a complex and time-consuming task, due to the large number of input variables to be determined simultaneously in order to meet its numerous specifications (system of multiple input variables and multiple output variables). The input variables of these analog ICs are typically the dimensions of the channel width and length and the bias conditions of the transistors, considering that these analog ICs will be manufactured in a given manufacturing process. The specifications of these projects are generally the voltage gain, the unit voltage gain frequency, the phase margin, the power consumption, among others. Traditionally, analogue IC designers carry out the initial analysis based on analytical equations to obtain a first dimensioning of their input variables. After that, they perform an interactive manual process of adjusting the input variables, usually based on SPICE simulations, until satisfactorily reaching the desired specifications. This interactive and repetitive process between the designer and the simulator is very laborious, slow and totally dependent on the designer's experience. In order to reduce the development time of analog ICs, the author of this proposal PIPE developed a program (software), based on evolutionary electronics, which uses the artificial intelligence (AI) technique called genetic algorithm (GA). This computer program was integrated with the SPICE circuit simulator and constituted an evolutionary system for analog IC designs, called AGSPICE. This tool was developed during the applicant's master's work. Subsequently, in the doctoral and postdoctoral work, AGSPICE was refined and renamed to iMTGSPICE, since it started to include other Artificial Intelligence (AI) optimization algorithms and also started to combine and use AI and Human Intelligence (IH) ), through the designer's knowledge, for the design and optimization of ROBUST analog and radio frequency integrated circuits allowing a significant reduction in the design time of ICs of months / weeks to days / hours, which results in a significant reduction in the cost of the project, which is in the order of magnitude of millions of dollars, and in the launch time of "Systems in a single integrated circuit" (System-on-a-chip , SoC) on the market. In the PIPE phase 1 project, our company prepared the business plan using the CANVAS tool and iMTGSPICE was used in the optimization process of some blocks of analog and RF ICs, whose simulation results were successfully validated by a professional tool (CADENCE) of IC designs. In addition, we have successfully performed the experimental electrical characterization of some prototype chips manufactured in the commercial technology of TSMC 65 nm in order to carry out the final experimental validation process of the iMTGSPICE optimization process to later make it a commercial product. This PIPE 1 project was already finished and has already been approved by FAPESP. The objective of this PIPE phase 2 project proposal is to improve the iMTGSPICE, based on the information acquired in the course "PIPE 1 Entrepreneur" with interviews of potential clients, to make it a commercial product. There are several activities that can be performed based on this project. Among these alternatives, we intend to provide services related to the design of analog and RF ICs and / or the commercialization of the license related to the use of iMTGSPICE for a certain period of time. Potential users of iMTGSPICE are the designers of the semiconductor industries who design analog and RF ICs, Design Houses, Universities around the world who carry out research and development activities in this area and the training of human resources, respectively. (AU)

Articles published in Agência FAPESP Newsletter about the research grant:
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VEICULO: TITULO (DATA)
VEICULO: TITULO (DATA)

Scientific publications
(References retrieved automatically from Web of Science and SciELO through information on FAPESP grants and their corresponding numbers as mentioned in the publications by the authors)
GALEMBECK, EGON HENRIQUE SALERNO; GIMENEZ, SALVADOR PINILLOS; DE LIMA MORETO, RODRIGO ALVES. Customized Imperialist Competitive Algorithm Methodology to Optimize Robust Miller CMOS OTAs. ELECTRONICS, v. 11, n. 23, p. 20-pg., . (20/09375-0)

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