Prototype of interactive computational intelligence for the design and optimization of analog CMOS integrated circuits

• Grant number: 18/21341-4
• Support Opportunities: Research Grants - Innovative Research in Small Business - PIPE
• Start date: August 01, 2019
• End date: October 31, 2020
• Field of knowledge: Engineering - Electrical Engineering - Electrical, Magnetic and Electronic Circuits
• Principal Investigator: Rodrigo Alves de Lima Moreto
• Grantee: Rodrigo Alves de Lima Moreto
• Company: MTG Solutions Softwares de Otimização para Engenharia Ltda
• CNAE: Atividades profissionais, científicas e técnicas não especificadas anteriormente
• Associated researchers: Carlos Eduardo Thomaz ; Salvador Pinillos Gimenez
• Associated research grant(s): 20/09375-0 - Design and interactive optimization tool for integrated circuits based on computational intelligence, AP.PIPE; 19/15659-4 - SBMicro 2019 - 34th Symposium on Microelectronics Technology and Devices, AR.BR
• Associated scholarship(s): 19/15874-2 - Prototype of interactive computational intelligence for the design and optimization of analog integrated circuits, BP.PIPE

Abstract

The design of the analog integrated circuits (ICs) is a complex and slow task, due to the large number of input variables to be simultaneously determined with the intention of meeting its numerous specifications (system with multiple input variables and multiple output variables). The input variables of these analog ICs are typically the dimensions of the channel width and length and the bias conditions of the transistors, considering that these analog ICs will be manufactured in a specific technological process. The design specifications are usually the voltage gain, unit voltage gain frequency, phase margin, power consumption, among others. Traditionally, the designers of analog ICs perform the initial analysis based on analytical equations to obtain a first sizing of their input variables. After that, they perform a manual interactive process of adjustment of the input variables, usually based on SPICE simulations, until reaching satisfactorily the desired specifications. This interactive and repetitive process between the designer and the simulator is very arduous, slow and totally dependent on the designer experience. With the purpose of reducing the development time of the analog ICs, the author of this PIPE proposal developed a program (software), based on evolutionary electronics, which uses the artificial intelligence (AI) technique named genetic algorithm (GA). This computer program was integrated to the circuits simulator SPICE and constituted an evolutionary system for analog ICs designs, entitled AGSPICE. This tool was developed during the master's work of the applicant, whose initial objective was to automatically search the potential different solutions that best meet the different design specifications of an analog IC, reducing significantly its design cycle time. Subsequently, in the doctoral and post-doctoral work, the AGSPICE was improved and now it includes other optimization algorithms of artificial intelligence, besides an innovative search process using the customized GA considering robustness analyses (Corner and Monte Carlo) inside the loop of the optimization process of the analog ICs and the development of an interactive method was implemented in this tool, which was renamed to iMTGSPICE. The aim of this PIPE proposal phase 1 is to use the iMTGSPICE in the optimization process of analog ICs to subsequently manufacture prototype chips in the 28 nm TSMC commercial technology. These chips will be electrically characterized with the objective of validating the iMTGSPICE optimization process in order to posteriorly make it a commercial product. There are several activities that can be performed based on this project. Among these alternatives, we intend to carry out the provision of services related to the analog ICs design and / or commercialization of the license related to the use of the iMTGSPICE for a certain time period. The potential users of the iMTGSPICE are the semiconductor industries that design analog ICs, universities around the world that conduct research in this field and training of human resources. (AU)

Scientific publications

(6)

(The scientific publications listed on this page originate from the Web of Science or SciELO databases. Their authors have cited FAPESP grant or fellowship project numbers awarded to Principal Investigators or Fellowship Recipients, whether or not they are among the authors. This information is collected automatically and retrieved directly from those bibliometric databases.)

BANIN JUNIOR, JOSE ROBERTO; DE LIMA MORETO, RODRIGO ALVES; DA SILVA, GABRIEL AUGUSTO; THOMAZ, CARLOS EDUARDO; GIMENEZ, SALVADOR PINILLOS. Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v. 106, n. 1, p. 293-306, JAN 2021. (18/21341-4)

MORETO, RODRIGO A. L.; ROCHA, DOUGLAS; THOMAZ, CARLOS E.; MARIANO, ANDRE; GIMENEZ, SALVADOR P.; IEEE. Interactive Evolutionary Approach to Reduce the Optimization Cycle Time of a Low Noise Amplifier. 2019 32ND SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN (SBCCI 2019), v. N/A, p. 6-pg., 2019-01-01. (18/21341-4)

DE LIMA MORETO, RODRIGO ALVES; THOMAZ, CARLOS EDUARDO; GIMENEZ, SALVADOR PINILLOS. A customized genetic algorithm with in-loop robustness analyses to boost the optimization process of analog CMOS ICs. Microelectronics Journal, v. 92, OCT 2019. (18/21341-4)

DE LIMA MORETO, RODRIGO ALVES; MARIANO, ANDRE; THOMAZ, CARLOS EDUARDO; GIMENEZ, SALVADOR PINILLOS. Optimization of a low noise amplifier with two technology nodes using an interactive evolutionary approach. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v. 106, n. 1, p. 307-319, JAN 2021. (18/21341-4)

BANIN JUNIOR, JOSE ROBERTO; DE LIMA MORETO, RODRIGO ALVES; DA SILVA, GABRIEL AUGUSTO; THOMAZ, CARLOS EDUARDO; GIMENEZ, SALVADOR PINILLOS; IEEE. Optimizing a Robust Miller OTA Implemented with Diamond Layout Style for MOSFETs By Using iMTGSPICE. 34TH SBC/SBMICRO/IEEE/ACM SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN (SBCCI 2021), v. N/A, p. 6-pg., 2021-01-01. (18/21341-4)

BANIN JUNIOR, JOSE ROBERTO; DE LIMA MORETO, RODRIGO ALVES; DA SILVA, GABRIEL AUGUSTO; THOMAZ, CARLOS EDUARDO; GIMENEZ, SALVADOR PINILLOS; IEEE. An Innovative Strategy to Reduce Die Area of Robust OTA by using iMTGSPICE and Diamond Layout Style for MOSFETs. 2019 32ND SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN (SBCCI 2019), v. N/A, p. 6-pg., 2019-01-01. (18/21341-4)