Design of a signal adquisition and digital processing ASIC for time projection chamber of ALICE experiment

• Grant number: 13/06885-4
• Support type: Regular Research Grants
• Duration: November 01, 2013 - June 30, 2016
• Field of knowledge: Engineering - Electrical Engineering
• Principal Investigator: Wilhelmus Adrianus Maria van Noije
• Grantee: Wilhelmus Adrianus Maria van Noije
• Home Institution: Escola Politécnica (EP). Universidade de São Paulo (USP). São Paulo , SP, Brazil
• Assoc. researchers: Alexandre Alarcon Do Passo Suaide ; Jun Takahashi ; Marcelo Gameiro Munhoz ; Nelson Carlin Filho ; Sergio Takeo Kofuji

Abstract

ALICE (A Large Ion Collider Experiment) is one of four major experiments of particle accelerator LHC (Large Hadron Collider) installed in the European laboratory CERN. The management committee of the LHC accelerator has just approved a program update for this experiment. Among the upgrades planned for the coming years of the ALICE experiment is to improve the resolution and tracking efficiency maintaining the excellent particles identification ability, and to increase the read-out event rate to 100KHz. In order to achieve this, it is necessary to update the Time Projection Chamber detector (TPC) and Muon tracking (MCH) detector modifying the read-out electronic. The TPC detector is the main device of the central barrel of the ALICE experiment for tracking and identification of charged particles. The TPC requires migrating from MWPC (Multi Wire Proportional Chamber) to GEM (Gas Electron Multiplier) to achieve the read-out rate required. The current read out-unit is not suitable for this migration due to two reasons. First, the signal pre- amplification integrated circuit (named PASA) of the read-out unit does not support signals with positive polarity, which is not adequate for signals generated by GEM detectors. The second limitation is related to the scheme used for data reading. The integrated circuit of analog-digital conversion and digital processing does not support continuous readout: TPC signals sampling and data storage on memory cannot happen simultaneously. Furthermore, these integrated circuits dissipate excessive power (considering the high number of channels required).This project proposes the design, simulation, fabrication, experimental testing and validation of a signal acquisition and digital processing prototype ASIC that can be used for signals detection in the TPC and MCH, which supports negative polarity, with 32 channels per chip, continuous data readout with lower power consumption than the previous versions. (AU)

Scientific publications

(References retrieved automatically from Web of Science and SciELO through information on FAPESP grants and their corresponding numbers as mentioned in the publications by the authors)

ADOLFSSON, J.; AYALA PABON, A.; BREGANT, M.; BRITTON, C.; BRULIN, G.; CARVALHO, D.; CHAMBERT, V.; CHINELLATO, D.; ESPAGNON, B.; HERNANDEZ HERRERA, H. D.; LJUBICIC, T.; MAHMOOD, S. M.; MJORNMARK, U.; MORAES, D.; MUNHOZ, M. G.; NOEL, G.; OSKARSSON, A.; OSTERMAN, L.; PILYAR, A.; READ, K.; RUETTE, A.; RUSSO, P.; SANCHES, B. C. S.; SEVERO, L.; SILVERMYR, D.; SUIRE, C.; TAMBAVE, G. J.; TUN-LANOE, K. M. M.; VAN NOIJE, W.; VELURE, A.; VERESCHAGIN, S.; WANLIN, E.; WEBER, T. O.; ZAPOROZHETS, S. SAMPA Chip: the New 32 Channels ASIC for the ALICE TPC and MCH Upgrades. Journal of Instrumentation, v. 12, APR 2017. Web of Science Citations: 3.