Super strained semiconductor nanowires.

• Grant number: 14/04637-6
• Support type: Scholarships in Brazil - Post-Doctorate
• Effective date (Start): October 01, 2014
• Effective date (End): September 30, 2016
• Field of knowledge: Engineering - Electrical Engineering - Electrical Materials
• Principal researcher: Jose Alexandre Diniz
• Grantee: Angélica Denardi de Barros
• Home Institution: Centro de Componentes Semicondutores (CCS). Universidade Estadual de Campinas (UNICAMP). Campinas , SP, Brazil

Abstract

Strain plays a critical role in the properties of many materials. In cubic crystal semiconductors, strain is a powerful tool to engineer bandstructure, providing control over band off sets, band splitting and effective masses. These physical modifications influence the thermal, optical and electrical properties of these materials. For these reasons, strain materials are applied to many devices ranging from high-speed electronics, to electromechanical systems (NEMS). In microelectronics, strained Si induced by stressor layers, featuring high carrier mobility, has been the main technology booster to enhance performance of transistors during the past decade, and will be now implemented in the next generation of CMOS devices featuring nanowire architectures. However, as scaling is reaching its limits and the state-of-the-art stressor techniques will be inefficient for smaller technology nodes, novel concepts are urgently required to enable the CMOS roadmap to continue. In this project we propose to explore a novel CMOS compatible strain technique to controllably deliver permanent high strain in semiconductor nanowires without using external actuators, which will enable studies of fundamental properties of different materials at different length scales under high stress. For this purpose, we will fabricate suspended uniaxially stressed constricted structures from tensily biaxially stressed substrates as starting materials. As the stress is inversely proportional to the cross sectional area of the structure, the stress accumulates locally and uniformly in the constriction. When the constriction approaches nano scale dimensions, it assembles a nanowire (NW). The proposed method is fully compatible to mainstream micro and nano fabrication techniques used in the industry and academy. Using this approach, we plan to characterize the material properties of Si and Ge nanowires under high loaded stresses. The proposed method allows systematic investigations in which the dimensions and strain of the materials will be accurately controlled, while the structures are precisely distributed in a wafer substrate.