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Implementation of the Low-PHY functions of the 5G network structure in an FPGA-accelerated SmartNIC using the OpenCL language and features.

Grant number: 23/04991-3
Support Opportunities:Scholarships in Brazil - Scientific Initiation
Effective date (Start): July 01, 2023
Effective date (End): June 30, 2024
Field of knowledge:Engineering - Electrical Engineering - Telecommunications
Principal Investigator:Rangel Arthur
Grantee:Youssef Hassan Gharib
Host Institution: Faculdade de Tecnologia (FT). Universidade Estadual de Campinas (UNICAMP). Limeira , SP, Brazil

Abstract

This research project aims to implement the Low-PHY layer functions of the 5G Distributed Unit (DU) in a programmable accelerator based on FPGA, exploiting the resources of the Open Computing Language (OpenCL), compatible with heterogeneous computing environments, allowing parallel processing. In addition to using OpenCL host pipes feature to further decrease signal processing time.Radio frequency (RF) signals are received in the FPGA and are processed according to the Low-PHY functions. In the downlink, the signal arrives at the frequency domain and undergoes the Inverse Fast Fourier Transform (IFFT), and a Cyclic Prefix (CP) is inserted to avoid inter-symbol interference (ISI). In the uplink, the signal in the time domain has the cyclic prefix removed and passes through the Fast Fourier Transform (FFT) that converts it to the frequency domain. Because the OpenCL programming language allows only one program written by the host to run on different heterogeneous platforms, it will be possible to make certain functions to run on the FPGA and others on the CPU, decreasing the load on the CPU's processors. Thus, the processing time of the signal samples will decrease, besides having a lower energy consumption.

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