The goal of this research is to develop an automated hardware testing system based on reconfigurable computing. The system should be used in the digital circuits laboratory of the DC/UFSCar to identify and test integrated circuits used in practical classes. The proposed system will be developed with the Quartus II tool, using the VHDL language, and must operate in the DE2-115 FPGA kit coupled to a protoboard through a 40-pin flat cable. This will require a thorough study of the physical characteristics of the circuits to be tested, as well as the kit used as development platform. The flexibility and variety of input and output features present in the current FPGAs, make this technology a good choice for the development of this designs without any need to fabricate complex boards. Since this is a project with physical implementation, it will be possible to apply it directly in the laboratory, through the identification and testing of existing CI.
News published in Agência FAPESP Newsletter about the scholarship: