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Author(s):
Marcello Bellodi
Total Authors: 1
Document type: Doctoral Thesis
Press: São Paulo.
Institution: Universidade de São Paulo (USP). Escola Politécnica (EP/BC)
Defense date:
Examining board members:
João Antonio Martino; Alvaro Romanelli Cardoso; Ely Antonio Tadeu Dirani; Aparecido Sirley Nicolett; Sebastião Gomes dos Santos Filho
Advisor: João Antonio Martino
Abstract

In this work we present a study of the leakage drain current behavior that appears in SOI MOSFETs devices operating at high-temperatures. To develop this analysis, a lot of devices were characterized at different channel length, drain and bulk bias condition operating from room temperature up to 300´DEGREE´C. To understand the leakage drain current mechanisms in SOI MOSFETs at high-temperatures, we performed a lot of numerical bidimensional simulations. As a results, it was observed that the leakage drain current mechanisms depends strongly on the channel characteristics and the physical dimensions as well, the drain and bulk bias. Usually, in the Accumulation-Mode SOI pMOSFETs and Enhancement-Mode SOI nMOSFETs, electrons and holes, respectively, are the main carriers for the total leakage drain current conduction when these devices are operating at high-temperatures and in the leakage region. Also we proposed semi-analytical models for both SOI MOSFETs analyzed in this work, which can be applied in circuit simulators ( PSPICE ) in order to determine the leakage drain current behavior according to the bias conditions and the temperature of operation. It was determined that the Accumulation-Mode SOI pMOSFETs operating at the leakage region, behaves like a pair of diodes connected by its cathodes that appear into the first and second interfaces, besides a resistor that represents the body leakage current component. Similarly for the Enhancement-Mode SOI nMOSFETs, the body and both interfaces are represented now by another pairs of diodes connected by its anodes, meaning each one components from the total leakage drain current. (AU)