Full text
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| Author(s): |
Michelly de Souza
Total Authors: 1
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| Document type: | Doctoral Thesis |
| Press: | São Paulo. |
| Institution: | Universidade de São Paulo (USP). Escola Politécnica (EP/BC) |
| Defense date: | 2008-10-16 |
| Examining board members: |
Marcelo Antonio Pavanello;
Ana Isabela Araújo Cunha;
Renato Camargo Giacomini;
Sebastião Gomes dos Santos Filho;
José Vieira do Vale Neto
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| Advisor: | Marcelo Antonio Pavanello |
| Abstract | |
In this work an analysis of the analog behavior of MOS transistors implemented in Silicon-on-Insulator technology, with graded-channel (GC) and mechanical strain applied to the channel, operating at low temperatures (from 380 K down to 90 K), in comparison to standard SOI devices is presented. This study has been carried out by using experimental measurements of transistors and small circuits, as well as through two-dimensional numerical simulations and analytical models. In the case of graded-channel transistors, an analytical model for the simulation of the drain current at low temperatures has been initially proposed. This model has been validated from 300 K down to 100 K and included to the models library of a circuit simulator. Important characteristics for analog circuits have been evaluated, namely the harmonic distortion of devices biased in saturation regime and the mismatching of parameters like the threshold voltage and the drain current, at several temperatures. Regarding the distortion, it has been verified a significant improvement due to the use of the graded-channel architecture, which reached more than 20 dB at 100 K. The matching has been worsened in comparison to standard transistor, due to misalignements that may take place in the devices processing, mainly in the definition of the lightly doped region in the channel. It has been observed a worsening of up to 2.5 mV in the threshold voltage variation and more than 2 % in the drain current, at room temperature, in comparison to the uniformly doped device. The impact of the application of GC transistors in current mirrors and commondrain amplifiers has been also evaluated. The experimental results showed that the graded-channel structure is able to provide improved performance of these analog blocks in comparison with uniformly doped transistors in the entire studied range of temperatures. Commom-drain amplifiers with virtually constant gain, close to the theoretical limit and current mirrors with improved mirroring precision in comparison to standard transistors, with increased output swing and output resistance have been obtained. Analog characteristics of SOI transistors with uniaxial and biaxial mechanical strain in the channel have been also compared as a function of the temperature. The analysis of experimental measurements indicates that the use of mechanical strain results in better or, at least, similar voltage gain than stardard transistors, for the same dimensions and technology. (AU) | |