| Full text | |
| Author(s): |
Total Authors: 2
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| Affiliation: | [1] Univ Fed Sao Carlos, Sao Carlos, SP - Brazil
Total Affiliations: 1
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| Document type: | Journal article |
| Source: | Integrated Computer-Aided Engineering; v. 25, n. 3, p. 289-303, 2018. |
| Web of Science Citations: | 2 |
| Abstract | |
In this article, a new framework is proposed and implemented for automatic generation of image filters in reconfigurable hardware (FPGA), called H-EHW (Hybrid-Evolvable Hardware). This consists basically of two modules. The first (training module) is responsible for the automatic generation of solutions (filters). The second (fusion module) converts such solutions into hardware, thus creating a virtual and reconfigurable architecture for fast image processing. Monochromatic pairs of images are used for the system training and testing. Extensive tests show that there are several benefits of the proposed system when compared to other similar systems described in the literature, such as: reduced phenotype length (generated circuit), reduced reconfiguration time, greater hardware reconfiguration flexibility and no more need for the manipulation of the bitstream of the FPGA for circuit evolution (a problem often encountered in practice by designers). (AU) | |
| FAPESP's process: | 15/23297-4 - System for automatic hardware generation in FPGAs by Cartesian Genetic Programming |
| Grantee: | Emerson Carlos Pedrino |
| Support Opportunities: | Regular Research Grants |