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Using Off-the-Shelf Hardware Transactional Memory to Implement Speculative While in OpenMP

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Author(s):
Salamanca, Juan ; Baldassin, Alexandro ; Klemm, M ; DeSupinski, BR ; Klinkenberg, J ; Neth, B
Total Authors: 6
Document type: Journal article
Source: OPENMP IN A MODERN WORLD: FROM MULTI-DEVICE SUPPORT TO META PROGRAMMING; v. 13527, p. 15-pg., 2022-01-01.
Abstract

This paper presents Speculative While (SWh), a technique that enables Speculative Task Execution (STE) in OpenMP to accelerate while loops marked by the proposed while construct and the swh clause. With SWh, the speculative tasks are generated by the OpenMP task construct in while loops (from linear algebra or goal finding algorithms) where control dependencies between iterations can be speculated. This paper also presents a detailed analysis of the application of Hardware Transactional Memory (HTM) support to implement Speculative While and describes a preliminary evaluation of SWh implementation using HTM. As a result, it provides evidence to support the performance benefits of using STE over HTM to parallelize some well-known benchmarks. Experimental results reveal that by implementing SWh over HTM, speed-ups of up to 1.8x can be obtained for the Gauss-Seidel benchmark. (AU)

FAPESP's process: 18/07446-8 - Integrating Speculative Execution to Loop and Task-based Parallelization
Grantee:Juan Jesús Salamanca Guillén
Support Opportunities: Scholarships in Brazil - Post-Doctoral
FAPESP's process: 18/15519-5 - Performance optimizations for multicore architectures
Grantee:Alexandro José Baldassin
Support Opportunities: Research Grants - Young Investigators Grants - Phase 2
FAPESP's process: 20/01665-0 - Integrating speculative execution to task parallelism
Grantee:Juan Jesús Salamanca Guillén
Support Opportunities: Scholarships abroad - Research Internship - Post-doctor