Study, electrical characterization and modeling of BE (Back Enhanced) SOI MOSFET transistors.

Author(s)

Leonardo Shimizu Yojo

• Document type: Master's Dissertation
• Press: São Paulo.
• Institution: Universidade de São Paulo (USP). Escola Politécnica (EP/BC)
• Defense date: 2018-02-08

Examining board members

João Antonio Martino; Salvador Pinillos Gimenez

• Advisor: João Antonio Martino

Abstract

The aim of this work is the study, the electrical characterization and the modeling of the new transistor that was developed and fabricated in the Laboratório de Sistemas Integráveis (LSI) at University of Sao Paulo (USP). It was named BE (Back Enhanced) SOI MOSFET. This innovative device has the advantage of a simple fabrication (only well-known processes are required to build it and there is no need of any doping step) and it has a reconfigurable operation (it can act as a n-type MOS transistor or as a ptype MOS transistor depending only on substrate bias). The substrate voltage (VGB) is responsible for the formation of an electron (VGB>0) or a hole (VGB<0) channel at the back interface of the silicon, where the drain current flows. The patent for it was required at the National Industrial Property Institute under the number BR 10 2015 020974 6. Electrical measurements and numerical simulations were performed to better understand its functioning principle and the characteristics that enable its reconfigurability. Two different fabrication splits were analyzed. Beside their thicknesses, the main difference between them is the drain and source metal electrode (aluminum in the first split and nickel in the second one). The one with aluminum electrodes resulted in Ohmic contacts after thermal processing, that favored the formation on the p-type transistor because of the nature of the used element. It was observed a variation of the threshold voltage (up to 1.52mV/ºC) and a mobility degradation (seen through the transconductance behavior) as a function of the temperature (from 25ºC to 125ºC), resulting in a zero-temperature coefficient (ZTC) bias point in this device. In this bias condition point, the drain current is almost constant as a function of the temperature, which is a good characteristic especially for analog circuits. The second split has Schottky drain and source contacts, in which appreciable current levels were obtained for both n-type transistors (order of magnitude of nA in the measured bias conditions) and p-type transistors (order of magnitude of ?A). The drain current of this device showed a particular behavior where the drain current stabilizes from a certain gate voltage. In this condition, the BE SOI MOSFET does not act as a conventional transistor anymore and its current is proportional to the substrate bias. Measurements as a function of the temperature were performed in the device too. It was observed an increase of the drain current, differently from the first split, due to the reduction of the source and drain contacts resistances as a function of the temperature. This resulted in the absence of the ZTC point. Finally, the operation of an inverter circuit using BE SOI MOSFET transistors was implemented, even if the type of the transistors were switched. This result shows the flexibility of operation of the transistor, in other words, it is possible to change its type as a function of the substrate bias. (AU)

• FAPESP's process: 15/25100-3 - STUDY, ELECTRICAL CHARACTERIZATION AND MODELING OF BE (Back Enhanced) SOI MOSFET TRANSISTORS
• Grantee: Leonardo Shimizu Yojo
• Support Opportunities: Scholarships in Brazil - Master