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| Author(s): |
Jorge Luis Gonzalez Reaño
Total Authors: 1
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| Document type: | Doctoral Thesis |
| Press: | Campinas, SP. |
| Institution: | Universidade Estadual de Campinas (UNICAMP). Instituto de Computação |
| Defense date: | 2021-05-06 |
| Examining board members: |
Rodolfo Jardim de Azevedo;
Fabiano Passuelo Hessel;
Paulo Sérgio Lopes de Souza;
Hugo Enrique Hernández Figueroa
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| Advisor: | Lois Orosa Nogueira; Rodolfo Jardim de Azevedo |
| Abstract | |
Photonics is emerging with promising devices for the design of next-gen computing systems. Recent developments in Silicon Photonics (SiP) fabrication techniques show that photonics can provide optical data-buffering, high-bandwidth interconnects, high-speed switching, and low energy-per-bit overhead. The objective of this thesis is to explore the new opportunities that photonics brings to computer architecture by: 1) evaluating the characteristics and limitations of a full-optical main memory, 2) proposing a reconfigurable optical multi-GPU architecture, and 3) proposing an optically connected memory architecture for disaggregated data centers. As a result, we present three contributions. First, we propose and evaluate a processor with a full-optical memory system built with a tree topology of cascaded switches for accessing the memory cells. The main goal is to obtain low memory access latency, similar to L1 and L2 caches latencies. This characteristic is based on the $ (AU) | |
| FAPESP's process: | 14/01642-9 - OMPSoC: Heterogeneous Optical Multiprocessor System on Chip Modeling |
| Grantee: | Jorge Luis Gonzalez Reano |
| Support Opportunities: | Scholarships in Brazil - Doctorate |