Full text
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| Author(s): |
Milene Galeti
Total Authors: 1
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| Document type: | Master's Dissertation |
| Press: | São Paulo. |
| Institution: | Universidade de São Paulo (USP). Escola Politécnica (EP/BC) |
| Defense date: | 2003-08-22 |
| Examining board members: |
João Antonio Martino;
Marcello Bellodi;
Marcelo Antonio Pavanello
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| Advisor: | João Antonio Martino |
| Abstract | |
This work presents a comparative analysis of the behavior of a novel SOI structure which has an asymmetric doping concentration profile into the channel, designated GC (Graded-Channel) SOI MOSFET, with the conventional fully depleted SOI MOSFET, at high temperature operation (from 30°C to 300°C). Threshold voltage, zero temperature coefficient, subthreshold slope, transconductance, gm/IDS ratio, Early voltage, low-frequency open-loop gain, multiplication factor, parasitic bipolar transistor gain and breakdown voltage were obtained experimentally and through two-dimensional numerical simulations. The obtained results for GC SOI devices agreed with the tendencies of the analytical models used to describe the high temperature behavior of conventional SOI MOSFET. It was verified that due to the increase of Early voltage the low-frequency open-loop gain (AV), obtained in GC SOI devices, was significantly larger than the conventional SOI at room and high temperature. The GC SOI devices presented a significant reduction in the multiplication factor, both in long as in short channel devices, this improvement occurs at high temperature, too. Even with reduction of silicon layer thickness the GC SOI showed an increase in breakdown voltage, both at room and at high temperature. For temperatures above 241°C the GC SOI devices studied became partially depleted and the variation tendencies of the parameters were affected, in way similar observed in the conventional SOI devices. (AU) | |