| Author(s): |
Molto, Allan Roberto
;
Paz, Bruna Cardoso
;
Casse, Mikael
;
Barraud, Sylvain
;
Reimbold, Gilles
;
Vinet, Maud
;
Faynot, Olivier
;
Pavanello, Marcelo Antonio
;
IEEE
Total Authors: 9
|
| Document type: | Journal article |
| Source: | 2018 33RD SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES (SBMICRO); v. N/A, p. 4-pg., 2018-01-01. |
| Abstract | |
This work presents a Low-Frequency Noise (LFN) investigation in fully depleted n-type Silicon-On-Insulator (SOI) nanowire transistors working in linear region with V-DS=50mV. Long-channel devices of 1 mu m and 10 mu m are evaluated. A wide range of fin width is considered in the LFN analysis, from 1 mu m up to 10 mu m. The results showed a flicker noise (1/f(gamma)) behavior and a decrease of normalized noise S-ID/I-DS(2) with gate voltage overdrive increase for frequencies bellow 500Hz. Above this frequency, it was possible to see that generation and recombination noise with 1/f(2) decay overlaps the flicker noise, becoming the predominant noise source. The cut-off frequency increases with gate voltage overdrive while the gamma exponent decreases. Gamma reduces from 1.3 to 0.9 and from 0.95 to 0.65 for devices with channel length of 1 mu m and 10 mu m, respectively. A major noise variation of about one order of magnitude with gate voltage overdrive increase was observed in devices of 1 mu m long in comparison to channel length of 10 mu m. The devices showed weak noise dependence on fin width due to mobility decrease as nanowires become narrower. (AU) | |
| FAPESP's process: | 15/10491-7 - Electrical characterization and tridimensional simulation of nanowires MOS transistors |
| Grantee: | Bruna Cardoso Paz |
| Support Opportunities: | Scholarships in Brazil - Doctorate |