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Integrated amplifier design using 130 nm SOI CMOS technology.

Grant number: 24/19181-0
Support Opportunities:Scholarships in Brazil - Scientific Initiation
Start date: June 01, 2025
End date: May 31, 2026
Field of knowledge:Engineering - Electrical Engineering - Electrical, Magnetic and Electronic Circuits
Principal Investigator:Paula Ghedini Der Agopian
Grantee:Gabriel Kawanaka Rubio
Host Institution: Faculdade de Engenharia. Universidade Estadual Paulista (UNESP). Campus Experimental São João da Boa Vista. São João da Boa Vista , SP, Brazil

Abstract

With the continuous evolution and miniaturization of devices, controlling short-channel effects of conventional MOSFET transistors has become a significant challenge for technological progress. MOSFET transistors fabricated using SOI technology have emerged as a solution, resulting in notable performance improvements, greater resistance to short-channel effects, and higher switching speed.This project aims to study the electrical behavior of SOI CMOS technology, for both fully and partially depleted devices, and apply them to analog blocks frequently used in integrated circuit design. The scientific initiation will focus on the DC electrical characterization of these transistors, analyzing both basic and analog parameters. The analyses will be performed through experimental measurements of these transistors, which are fundamental for understanding the differences between fully and partially depleted transistors and calibrating the model to be used in the simulation of the amplifier using the fully depleted transistor. To find the capacitances inherent to the project, the amplifier layout will be designed using Microwind, from which its static transfer characteristic and dynamic behavior will be evaluated. The SPICE code will also be extracted so that we can simulate using the BSIMSOI model considering inherent characteristics of the project (layout). The project also seeks to complement the student's academic training, since SOI CMOS technology is not addressed during the undergraduate course, and the development of integrated analog blocks is becoming increasingly relevant.

News published in Agência FAPESP Newsletter about the scholarship:
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