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(Reference retrieved automatically from Web of Science through information on FAPESP grant and its corresponding number as mentioned in the publication by the authors.)

A Novel Methodology for Automated Generation of Flexible Hardware Architectures

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Pedrino, Emerson Carlos [1] ; Gallon, Igor Felipe [1] ; Valente, Fredy Joao [1] ; Fernandes, Marcio Merino [1] ; Ogashawara, Osmar [2] ; Roda, Valentin Obac [3]
Total Authors: 6
[1] UFSCar Univ Fed Sao Carlos, Dept Comp, Sao Carlos, SP - Brazil
[2] UFSCAR Univ Fed Sao Carlos, Dept Elect Engn, Sao Carlos, SP - Brazil
[3] UFRN Univ Fed Rio Grande do Norte, Dept Elect Engn, Natal, RN - Brazil
Total Affiliations: 3
Document type: Journal article
Source: PRZEGLAD ELEKTROTECHNICZNY; v. 94, n. 4, p. 17-21, 2018.
Web of Science Citations: 0

The automated generation of hardware architectures is a powerful tool in the fully interconnected world. This work presents a new methodology based around Cartesian Genetic Programming for generating flexible hardware architectures. The solution is composed by an intelligent module developed in software which is responsible for the generation of the solution logic for the pretended architecture, and by a hardware module developed in Verilog-HDL, which converts the obtained solution logic into a hardware architecture in FPGA. Good results were reached and compared to other similar proposals found in the literature. (AU)

FAPESP's process: 17/17226-2 - IoT - UFSCar - Internet of Things
Grantee:Fredy Joao Valente
Support type: Regular Research Grants
FAPESP's process: 15/23297-4 - System for automatic hardware generation in FPGAs by Cartesian Genetic Programming
Grantee:Emerson Carlos Pedrino
Support type: Regular Research Grants
FAPESP's process: 14/26796-9 - Automatic system in FPGA to generate logical circuits using cartesian genetic programming
Grantee:Igor Felipe Gallon
Support type: Scholarships in Brazil - Scientific Initiation