Extraction of the Back Channel Mobility in SOI Nanowire MOS Transistors under Substrate Biasing

Author(s)

Bergamaschi, Flavio E. ; Wirth, Gilson, I ; Barraud, Sylvain ; Casse, Mikael ; Vinet, Maud ; Faynot, Olivier ; Pavanello, Marcelo A. ; IEEE

• Document type: Journal article
• Source: 2022 IEEE LATIN AMERICAN ELECTRON DEVICES CONFERENCE (LAEDC); v. N/A, p. 4-pg., 2022-01-01.

Abstract

In this work, an analysis of the effective mobility of SOI nanowire MOS transistors is performed by separating the mobility of electrons in the back channel, which is created when substrate bias is applied. Measurements are done in n-type devices with an O-gate structure and variable channel length. Both longer and shorter channel devices present higher mobility in the back channel, but strong mobility reduction is observed with the increase of the substrate bias, reaching values close to that of the front channel at strong back bias levels. This effect is independent of the applied gate voltage overdrive. Three-dimensional TCAD simulation validates the method used to separate the back channel mobility, showing that the front channel mobility is not changed by the increase in substrate bias. (AU)

• FAPESP's process: 19/15500-5 - Atomistic simulation of nanowire MOSFETs electrical properties
• Grantee: Marcelo Antonio Pavanello
• Support Opportunities: Regular Research Grants