An Innovative Strategy to Reduce Die Area of Robust OTA by using iMTGSPICE and Diamond Layout Style for MOSFETs

Author(s)

Banin Junior, Jose Roberto ; de Lima Moreto, Rodrigo Alves ; da Silva, Gabriel Augusto ; Thomaz, Carlos Eduardo ; Gimenez, Salvador Pinillos ; IEEE

• Document type: Journal article
• Source: 2019 32ND SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN (SBCCI 2019); v. N/A, p. 6-pg., 2019-01-01.

Abstract

This paper describes a pioneering design and optimization methodology that provides a remarkable die area reduction of robust analog Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuits (ICs) by using a computational tool based on artificial intelligence (iMTGSPICE) and the Diamond layout style for MOSFETs. The validation of this innovative optimization strategy for analog CMOS ICs was made for an Operational Transconductance Amplifiers (OTA) by using 180 nm CMOS ICs technology. The main finding of this work reports a remarkable reduction of the total die area of a robust OTA around 30%, regarding the use of Diamond MOSFETs with alfa angles of 45 degrees when compared to the one implemented with standard rectangular MOSFETs. (AU)

• FAPESP's process: 18/21341-4 - Prototype of interactive computational intelligence for the design and optimization of analog CMOS integrated circuits
• Grantee: Rodrigo Alves de Lima Moreto
• Support Opportunities: Research Grants - Innovative Research in Small Business - PIPE