Influence of Technological and Geometrical Parameters on the Performance of Graded...
Evaluation of Electrical Performance of SOI Nanowire Transistors for Low Power App...
Parasitic bipolar effects in gradechannel fully-depleted silicon-on-insulation nmo...
Integrated amplifier design using 130 nm SOI CMOS technology.
Study of the transistors electrical behavior of 130 nm SOI CMOS technology for app...
Modeling, Simulation and Fabrication of Analog Circuits with Asymmetric Self-Casco...
STUDY, ELECTRICAL CHARACTERIZATION AND MODELING OF BE (Back Enhanced) SOI MOSFET T...