Partition analysis of a large-scale network in a cluster of FPGAs
System for automatic hardware generation in FPGAs by Cartesian Genetic Programming
Advanced signal processing techniques on telecommunications: desconvolution and id...
Implementation of a convolutional layer using approximate multipliers in FPGA for ...
An accelerator for deep neural convolutional networks implemented in FPGA
Using genetic algorithms for the automatic generation of configurable architecture...
Combining data and computation transformations for Fine-grain reconfigurable archi...